 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| alliance semiconductor high performance 1m4 cmos dram as4c14400 as4c14405 ? 1m-bit 4 cmos dram (fast page mode or edo) preliminary information features ? organization: 1,048,576 words 4 bits ? high speed - 40/50/60/70 ns ras access time - 20/25/30/35 ns column address access time - 10/13/15/18 ns cas access time ? low power consumption - active: 385 mw max (-60) - standby: 5.5 mw max, cmos i/o ? fast page mode (as4c14400) or edo (as4c14405) ? 1024 refresh cycles, 16 ms refresh interval - ras -only or cas -before-ras refresh ? read-modify-write ? ttl-compatible, three-state i/o ? jedec standard packages - 300 mil, 20/26-pin soj - 300 mil, 20/26-pin tsop ? single 5v power supply ? esd protection 3 2001v ? latch-up current 3 200 ma pin arrangement gnd i/o3 i/o2 cas oe a8 a7 i/o0 i/o1 we ras a9 a0 a1 tsop a6 a5 a4 a2 a3 v cc 1 2 3 4 5 9 10 26 25 24 23 22 18 17 11 12 13 16 15 14 gnd i/o3 i/o2 cas oe a8 a7 i/o0 i/o1 we ras a9 a0 a1 a6 a5 a4 a2 a3 v cc 1 2 3 4 5 9 10 26 25 24 23 22 18 17 11 12 13 16 15 14 soj pin designation pin(s) description a0 to a9 address inputs ras row address strobe i/o0 to i/o3 input/output oe output enable cas column address strobe we read/write control v cc power (5.0 0.5v) gnd ground selection guide shaded areas contain a dvance information. symbol 4c14400-40 4c14400-50 4c14400-60 4c14400-70 unit maximum ras access time t rac 40 50 60 70 ns maximum column address access time t caa 20 25 30 35 ns maximum cas access time t cac 10 13 15 18 ns maximum output enable (oe ) access time t oea 10 13 15 18 ns minimum read or write cycle time t rc 70 90 110 130 ns minimum fast page mode cycle time t pc 30 35 40 45 ns maximum operating current i cc1 90 80 70 60 ma maximum cmos standby current i cc5 1.0 1.0 1.0 1.0 ma
? as4c14400 2 functional description the as4c14400 is a high performance cmos dynamic random access memory organized as 1,048,576 words 4 bits. the as4c14400 is fabricated with advanced cmos technology and designed with innovative design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels. the as4c14400 features a high speed page mode opera tion in which high speed read, write and read-write are performed on any of the 1024 4 bits defined by the column address. the asynchronous column address uses an extremely short row address capture t ime to ease the system level timing constraints associated with multiplexed addressing. output is tri-stated by a column ad dress strobe (cas ) which acts as an output enable independent of ras . very fast cas to output access time eases system design. refresh on the 1024 address combinations of a0 to a9 during a 16 ms period is accomplished by performing any of the following: ?ras -only refresh cycles ? hidden refresh cycles ?cas -before-ras refresh cycles ? normal read or write cycles the as4c14400 is available in jedec standard 20/26-pin plastic soj and 20/26-pin plastic tsop packages. system level features include single power supply of 5.0 0.5v tolerance and direct interface with ttl logic families. logic block diagram recommended operating conditions recommended operating conditions apply to all specifications unless otherwise noted. parameter symbol minimum nominal maximum unit supply voltage v cc 4.5 5.0 5.5 v gnd 0.0 0.0 0.0 v input voltage v ih 2.4 C v cc + 1 v v il C1.0 C 0.8 v operating temperature ta 0 70 c refresh controller 1024 1024 4 array (4,194,304) sense amp a0 a1 a2 a3 a4 a5 a6 a7 i/o0 i/o3 vcc gnd address buffer a8 i/o2 i/o1 row decoder column decoder data i/o oe ras cas we a9 ras clock generator cas clock generator we clock generator ? as4c14400 3 absolute maximum ratings note: stresses greater than those l isted under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions outs ide those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. dc electrical characteristics shaded areas contain advance information. parameter symbol minimum maximum unit input voltage v in -1.0 +7.0 v output voltage v out -1.0 +7.0 v power supply voltage v cc -1.0 +7.0 v storage temperature (plastic) t stg -55 +150 c soldering temperature time t solder C 260 10 o c sec power dissipation p d C1w dc output current i out C50ma parameter symbol test conditions -40 -50 -60 -70 unit notes min max min max min max min max input leakage current i i 0v v in +5.5v pins not under test = 0v -2 +2 -2 +2 -2 +2 -2 +2 a output leakage current i oz outputs disabled, 0v v out +5.5v -10 +10 -10 +10 -10 +10 -10 +10 a operating power supply current i cc1 ras , cas , address cycling: t rc =min C 90 C 80 C 70 C 60 ma 1,2 ttl standby power supply current i cc2 ras = cas = v ih C 2.0 C 2.0 C 2.0 C 2.0 ma average power supply current, ras refresh mode i cc3 ras cycling, cas = vih, t rc = min C 90 C 80 C 70 C 60 ma 1 fast page mode average power supply current i cc4 ras = v il , cas cycling, address cycling: t pc = min C 80 C 70 C 60 C 50 ma 1,2 cmos standby power supply current i cc5 ras = cas = v cc - 0.2v C 1.0 C 1.0 C 1.0 C 1.0 ma cas -before-ras refresh power supply current i cc6 ras , cas cycling: t rc = min C 90 C 80 C 70 C 60 ma 1 output voltage v oh i out = -5.0 ma 2.4 C 2.4 C2.4C2.4Cv v ol i out = 4.2 ma C 0.4 C 0.4 C 0.4 C 0.4 v ? as4c14400 4 ac parameters common to all waveforms shaded areas contain advance information. read cycle shaded areas contain advance information. symbol parameter -40 -50 -60 -70 unit notes min max min max min max min max t rc random read or write cycle time 70 C 90 C110C130C ns t rp ras precharge time 20 C 30 C40C50Cns t ras ras pulse width 40 10k 50 10k 60 10k 70 10k ns t cas cas pulse width 10 C 13 C15C18Cns t rcd ras to cas delay time 18 30 20 37 20 45 20 52 ns 6 t rad ras to column address delay time 13 20 15 25 15 30 15 35 ns 7 t rsh(r) cas to ras hold time (read) 10 C 13 C15C18Cns t csh ras to cas hold time 40 C 50 C60C70Cns t crp cas to ras precharge time 0 C 0 C0C0Cns t asr row address setup time 0 C 0 C0C0Cns t rah row address hold time 8 C 10 C10C10Cns t t transition time (rise and fall) 2 50 2 50 2 50 2 50 ns 4,5 t ref refresh period C 16 C 16 C 16 C 16 ms 3 t clz cas to output in low z 0 C 0 C0C0Cns8 symbol parameter -40 -50 -60 -70 unit notes min max min max min max min max t rac access time from ras C 40 C 50 C 60 C 70 ns 6 t cac access time from cas C 10 C 13 C 15 C 18 ns 6,13 t aa access time from address C 20 C 25 C 30 C 35 ns 7,13 t ar(r) column add hold from ras 30 C 40 C45C55Cns t rcs read command setup time 0 C 0 C0C0Cns t rch read command hold time to cas 0 C 0 C0C0Cns9 t rrh read command hold time to ras 0 C 0 C0C0Cns9 t ral column address to ras lead time 20 C 25 C30C35Cns t cpn cas precharge time 5 C 10 C10C10Cns t ods output disable setup time 0 C 0 C0C0Cns t off output buffer turn-off time 0 10 0 13 0 15 0 18 ns 8,10 ? as4c14400 5 write cycle shaded areas contain advance information. read-modify-write cycle shaded areas contain advance information. symbol parameter -40 -50 -60 -70 unit notes min max min max min max min max t asc column address setup time 0 C 0 C0C0Cns t cah column address hold time 8 C 10 C10C15C ns t awr column address hold time to ras 30 C 40 C45C55C ns t wcs write command setup time 0 C 0 C0C0Cns11 t wch write command hold time 5 C 10 C10C15C ns11 t wcr write command hold time to ras 30 C 40 C45C55C ns t wp write command pulse width 8 C 10 C10C15C ns t rwl write command to ras lead time 10 C 13 C15C18C ns t cwl write command to cas lead time 10 C 13 C15C18C ns t ds data-in setup time 0 C 0 C0C0Cns12 t dh data-in hold time 8 C 10 C10C15C ns12 t dhr data-in hold time to ras 30 C 40 C45C55C ns symbol parameter -40 -50 -60 -70 unit notes min max min max min max min max t rwc read-write cycle time 105 C 131 C 155 C 181 C ns t rwd ras to we delay time 60 C 73 C85C98Cns11 t cwd cas to we delay time 30 C 36 C40C46Cns11 t awd column address to we delay time 40 C 48 C55C63Cns11 t rsh(w) cas to ras hold time (write) 10 C 13 C15C18Cns t cas(w) cas pulse width (write) 10 C 13 C15C18Cns ? as4c14400 6 fast page mode cycle shaded areas contain advance information. refresh cycle shaded areas contain advance information. output enable shaded areas contain advance information. symbol parameter -40 -50 -60 -70 unit notes min max min max min max min max t pc read-write cycle time (fast page) 30 C 35 C40C45Cns14 t cap access time from cas precharge C 25 C 30 C 35 C 40 ns 13 t cp cas precharge time (fast page) 5 C 10 C10C10Cns t pcm fast page mode rmw cycle 65 C 76 C85C96Cns t crw page mode cas pulse width (rmw) 45 C 54 C60C69Cns t rasp ras pulse width 40 100k 50 100k 60 100k 70 100k ns symbol parameter -40 -50 -60 -70 unit notes min max min max min max min max t csr cas setup time (cas -before-ras ) 10 C 10 C10C10Cns3 t chr cas hold time (cas -before-ras ) 10 C 10 C15C15Cns3 t rpc ras precharge to cas hold time 0 C 0 C0C0Cns t cpt cas precharge time (cas -before-ras counter test) 5 C 10 C10C10Cns std symbol parameter -40 -50 -60 -70 unit notes min max min max min max min max t roh ras hold time referenced to oe 5 C 10 C10C10Cns t oea oe access time C 10 C 13 C 15 C 18 ns t oed oe to data delay 10 C 13 C15C18Cns t oez output buffer turnoff delay from oe C 10 C 13 C 15 C 18 ns 8, 10 t oeh oe command hold time 10 C 13 C15C18Cns ? as4c14400 7 notes 1i cc1 , i cc3 , i cc4 , and i cc6 depend on cycle rate. 2i cc1 and i cc4 depend on output loading. specified values are obtained with the output open. 3 an initial pause of 200 m s is required after power-up followed by any 8 ras cycles before proper device operation is achieved. in the case of an internal refresh counter, a minimum of 8 cas -before-ras initialization cycles instead of 8 ras cycles are required. 8 initialization cycles are required after extended periods of bias without clocks (greater than 16 ms). 4 ac characteristics assume t t = 5 ns. all ac parameters are measured with a load equivalent to two ttl loads and 100 pf, v il (min) 3 gnd and v ih (max) v cc . see ac test conditions for more information. 5v ih (min) and v il (max) are reference levels for measuring timing of input signals. transition times are measured between v ih and v il . 6 operation within the t rcd (max) limit ensures that t rac (max) can be met. t rcd (max) is specified as a reference point only. if t rcd is greater than the specified t rcd (max) limit, then access time is controlled exclusively by t cac . 7 operation within the t rad (max) limit ensures that t rac (max) can be met. t rad (max) is specified as a reference point only. if t rad is greater than the specified t rad (max) limit, then access time is controlled exclusively by t aa . 8 assumes three state test load (5 pf and a 380 w thevenin equivalent). 9 either t rch or t rrh must be satisfied for a read cycle. 10 t off (max) defines the time at which the output achieves the open circuit condition; it is not referenced to output voltage levels. 11 t wcs , t wch , t rwd , t cwd and t awd are not restric tive operating parameters. they are included in the datasheet as electrical characteristics only. if t wcs 3 t wcs (min) and t wch 3 t wch (min), the cycle is an early write cycle and data out pins will remain open circuit, high impedance, throughout the cycle. if t rwd 3 t rwd (min), t cwd 3 t cwd (min) and t awd 3 t awd (min), the cycle is a read-write cycle and the data out will contain data read from the selected cell. if neither of the a bove conditions is satisfied, the condition of the data out at access time is in determinate. 12 these parameters are referenced to cas leading edge in early write cycles and to we leading edge in read-write cycles. 13 access time is determined by the longest of t caa or t cac or t cap . 14 t asc 3 t cp to achieve t pc (min) and t cap (max) values. 15 these parameters are sampled and not 100% tested. ac test conditions key to switching waveforms - access times are measured with output reference levels of v oh = 2v and v ol = 0.8 v - input rise and fall times: 5 ns 100 pf* r2 = 295 w r1 = 828 w d out gnd +5v figure b: equivalent output load *including scope 10% 90% 10% 90% +3.0v and jig capacitance figure a: input waveform dont care input rising input falling input aaaa a aaa a aaa a aaa aaaa aa a a a a a a aa aaaa a aaa a aaa a aaa aaaa a a a a a undefined output aaaa aaaa aaaa aaaa aaaa ? as4c14400 8 timing waveform of read cycle timing waveform of early write cycle aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa t ras aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa t rc t rp t rsh t rad t rch t off ras cas address we oe i/o column row t crp t csh t rcd t asc t cah t cas t ar t ral t rcs t aa t rac t clz t rrh data out t asr t rah t roh t cac t oea t oez aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa t ras t rc t rp t crp t rsh t rcd t csh t cas t rad t asc t awr t wcs t cwl t rwl t wch t wp t ds t dh t dhr column data in ras cas address we oe i/o row t wcr t ral t asr t rah t cah ? as4c14400 9 timing waveform of write cycle (oe controlled) timing waveform of read-write cycle row aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa t ras t rc t rp t crp t rsh t rcd t csh t cas t rah t ral t rad t cah t cwl t rwl t wcr t oeh t oed t ds t dh data in ras cas address we oe i/o column t dhr t wp t asc t awr t asr aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa t ras t rwc t rp t crp t rsh t rcd t csh t cas t rad t ral t ar t cah t cwl t cwd t rwl t awd t wp t oea t clz t cac t aa t ds t dh row column data in data out ras cas address we oe i/o t rwd t rcs t rac t oez t oed t asc t asr t rah ? as4c14400 10 timing waveform of fast page mode read cycle timing waveform of fast page mode early write cycle row aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa t rasp t rp t crp t rcd t cas t csh t rsh t pc t asr t rad t rch t rcs t rrh t rch t oea t oea t aa t rac t oez t cac data out data out data out column column column ras cas address we oe i/o t ar t rah t asc t cah t ral t rcs t clz t cp t off aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa t cap aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa t rasp t rwl t asc t wcs t cp t ral t wch t cwl t wp t ds t dh t cas row column column column data in data in data in ras cas address we oe i/o t pc t cah t csh t rcd t oeh t hdr t ar t rad t asr t crp t rah t rsh t oed ? as4c14400 11 timing waveform of fast page mode read-write cycle timing waveform of ras only refresh cycle (we = oe = v ih or v il ) timing waveform of cas -before-ras refresh cycle (we = oe = v ih or v il ) aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa a a a a aaa aaa aaa aaa aaaa aaaa aaaa aaaa a a a a aaa aaa aaa aaa aaaa aaaa aaaa aaaa a a a a t rasp t rp t rcd t csh t cas t cp t crp t asr t cah t cah t ral t cah t cwd t awd t cwd t cwl t cwd t awd t rwl t wp t oez t oea t rac t ds t clz t cac t cap row column column column data out data in data in data out data out data in ras cas address we oe i/o t rad t rah t rwd t rcs t cwl t oea t aa t dh t ds t clz t cac t clz t cac t oed t pcm aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa t ras t rp t rc t crp t rpc row ras cas address t ars t rah aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa t rp t rc t ras t rpc t cpn t csr t chr t off ras cas i/o ? as4c14400 12 timing waveform of hidden refresh cycle (read) timing waveform of hidden refresh cycle (write) aaa aaa aaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa t ras t rc t pr t ras t rc t pr t crp t rcd t rsh t crp t chr t asr t rad t asc t rrh t oea t clz t cac t oez t off column row data out ras cas address we oe i/o t ar t rah t rac t aa t rcs t rad aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa a a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa t ras t rc t rp t crp t rcd t rsh t asr t rah t ar t cah t wcs t wch t ds t dh data in column row ras cas address we i/o oe t asc t rwl t wcr t wp t dhr t ral ? as4c14400 13 timing waveform of cas before ras refresh counter test cycle aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa a a a aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aa aa aa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaaa aaa aaa aaa aaa aaa aaa aaaa aaaa aaaa t ras t rsh t rp t csr t chr t cpt t cas t cah t clz t cac t rch t rrh t roh t oea t rwl t cwl t wcs t wp t wch t ds t dh t rcs t oea t ds t dh column data out data in data out data in ras cas address i/o we oe we i/o oe we oe i/o t oed t aa t clz t cac t oez t wp t cwl t rcs t aa t off t awd t cwd t ral read cycle write cycle read-write cycle ? as4c14400 14 typical dc and ac characteristics supply voltage (v) 4.1 5.5 6.0 5.0 4.5 0.8 0.9 1.1 1.2 1.0 1.3 1.4 1.5 normalized access time normalized access time t rac ambient temperature (c) C55 80 125 35 C10 0.8 0.9 1.1 1.2 1.0 1.3 1.4 1.5 normalized access time normalized access time t rac load capacitance (pf) 50 200 250 150 100 20 30 50 60 40 70 80 90 typical access time (ns) typical access time t rac vs. ambient temperature t a vs. load capacitance c l vs. supply voltage v cc t a = 25c -60 -50 -40 4.0 5.5 6.0 5.0 4.5 0.0 10 30 40 20 50 60 70 supply voltage (v) supply current (ma) typical supply current i cc ambient temperature (c) C55 80 125 35 C10 0.0 10 30 40 20 50 60 70 supply current (ma) typical supply current i cc cycle rate (mhz) 28 10 6 4 0.0 10 30 40 20 50 60 70 power-on current (ma) typical power-on current i po vs. ambient temperature t a vs. cycle rate 1/t rc vs. supply voltage v cc supply voltage (v) 4.0 5.5 6.0 5.0 4.5 0.0 10 30 40 20 50 60 70 refresh current (ma) typical refresh current i cc3 ambient temperature (c) C55 80 125 35 C10 0.0 10 30 40 20 50 60 70 refresh current (ma) typical refresh current i cc3 supply voltage (v) 28 10 6 4 0.0 0.5 1.5 2.0 1.0 2.5 3.0 3.5 stand-by current (ma) typical ttl stand-by current i cc2 vs. ambient temperature t a vs. supply voltage v cc vs. supply voltage v cc ? as4c14400 15 capacitance (f = 1 mhz, t a = room temperature) parameter symbol signals test conditions max unit input capacitance c in1 a0 to a8 v in = 0v 5 pf c in2 ras , cas , we , oe v in = 0v 7 pf i/o capacitance c i/o i/o0 to i/o3 v in = v out = 0v 7 pf ambient temperature (c) 06080 40 20 0.0 0.5 1.5 2.0 1.0 2.5 3.0 3.5 stand-by current (ma) typical ttl stand-by current i cc2 vs. ambient temperature t a fast page mode current (ma) ambient temperature (c) 06080 40 20 0.0 10 30 40 20 50 60 70 fast page mode current (ma) typical fast page mode current i cc4 supply voltage (v) 4.0 5.5 6.0 5.0 4.5 0.0 10 30 40 20 50 60 70 typical fast page mode current i cc4 vs. supply voltage v cc vs. ambient temperature t a alliance semiconductor 3099 north first street san jose, ca 95134 (408) 383-4900 fax (408) 383-4999 printed in u.s.a.he copyright ? 1996 all rights reserved. june 1996 as4c14400 alliance semiconductor reserves the right to make changes in this data sheet at any time to improve design and supply the best product possible. publication of advance information does not constitute a committment to produce or supply the product described. the company cannot assume responsibility for circuits shown or represent that they are free from patent infringement. alliance products are not authorized for use as critical components in life support devices or systems without the express wr itten appr oval of the president of alliance. promotion ? and the alliance logo are re gistered trademarks of alliance semiconductor corporation. all other trademarks are property of their respective holders. ? domestic reps alabama concord component (205) 772-8883 arkansas southern states marketing (214) 238-7500 california n orth brooks technical (415) 960-3880 la a rea competitive tech. (714) 450-0170 s an d iego ats (619) 634-1488 colorado technology sales (303) 692-8835 connecticut kitchen & kutchin (203) 239-0212 delaware electro tech (610) 272-2125 florida micro-electronic comp. d eerfield b each (954) 426-8944 o rlando (407) 682-9602 t ampa (813) 393-5011 georgia concord component (770) 416-9597 hawaii brooks technical (415) 960-3880 idaho es/chase (503) 684-8500 illinois n orth el-mech (312) 794-9100 s outh centech (314) 291-4230 indiana cc electro sales (317) 921-5000 kansas centech (816) 358-8100 kentucky cc electro sales (317) 921-5000 louisiana southern states marketing n orth (214) 238-7500 s outh (713) 895-8533 maine kitchen & kutchin (617) 229-2660 maryland chesapeake tech. (301) 236-0530 massachusetts kitchen & kutchin (617) 229-2660 michigan enco group (810) 338-8600 minnesota d. a. case associates (612) 831-6777 missouri centech e ast (314) 291-4230 w est (816) 358-8100 mississippi concord component (205) 772-8883 montana es/chase (503) 684-8500 nebraska centech (816) 358-8100 nevada brooks technical (415) 960-3880 new hampshire kitchen & kutchin (617) 229-2660 new jersey n orth era associates (800) 645-5500 s outh electro tech (610) 272-2125 new york nyc era associates (516) 543-0510 u pstate tri-tech r ochester (716) 385-6500 b inghamton (607) 722-3580 north carolina concord component (919) 846-3441 north dakota d. a. case associates (612) 831-6777 ohio midwest marketing assoc. l yndhurst (216) 381-8575 d ayton (513) 433-2511 oklahoma southern states marketing (214) 238-7500 oregon es/chase (503) 684-8500 pennsylvania e ast electro tech (610) 272-2125 w est midwest marketing (216) 381-8575 rhode island kitchen & kutchin (617) 229-2660 south carolina concord component (919) 846-3441 south dakota d. a. case associates (612) 831-6777 tennessee concord component (205) 772-8883 texas southern states marketing a ustin (512) 835-5822 d alla (214) 238-7500 h ouston (713) 895-8533 utah charles fields & assoc. (801) 299-8228 vermont kitchen & kutchin (617) 229-2660 virginia chesapeake tech. (301) 236-0530 washington es/chase (206) 823-9535 west virginia chesapeake tech. (301) 236-0530 wisconsin d. a. case associates (612) 831-6777 wyoming technology sales (303)692-8835 intern ational reps australia d ingley r&d electronics +61-3-9558-0444 b ayswater acd +61-3-9762-7644 canada j-squared technologies o ttawa (613) 592-9540 t oronto (905) 672-2030 m ontreal (514) 747-1211 v ancouver (604) 473-4666 c algary (403) 291-6755 europe britcomp sales s urrey , e ngland +44-1932 347077 +44-1932 346256 m unich , g ermany +49-894488496 a thismons , f rance +33-1-69387678 interac tive g reat b ritain , i reland +44-1773-740263 ramtec intl b.v. h olland , s pain , i taly , b elgium , h ungary , r ussia +31-2526-21222 hong kong eastele technology +852-2798-8860 india priya electronics, inc. san jose, ca usa (408) 954-1866 satcom sales & srvcs. +91-40-761-4675 israel eldis technology +972-9-562-666 japan t okyo bussan micro electronics +81-3-5421-1730 k yoto rohm co. ltd. +81-75-311-2121 korea fm korea +822-596-3880 fm@ktnet.co.kr woo young tech +822-369-7099 malaysia exer technologies +65-741-4655 puerto rico micro-electronic comp. (787) 746-9897 singapore exer technologies +60-4-657-9592 taiwan asian specific tech. +886-2-521-2363 golden way electronics +886-2-698-1868 x505 puteam international +886-2-729-0373 distributors all american hq: (305) 621-8282 axis: components, inc. hq: (800) 556-0225 future electronics hq: (514) 594-7710 interface electronics hq: (800) 632-7792 please contact y our rep to locate a distributor near you sales offices headquarters alliance semiconductor san jose, ca (408) 383-4900 northeast area alliance semiconductor boston, ma (617) 239-8127 technical center taiwan alliance semiconductor tel:+886-2-516-7995 fax:+886-2-517-4928 alliance@netra.wow.net.tw ordering codes shaded areas contain advance information. part numbering system representatives, distributors, and sales offices package \ ras access time 40 ns 50 ns 60 ns 70 ns plastic soj, 300 mil, 20/26-pin as4c14400-40jc as4c14405-40jc as4c14400-50jc as4c14405-50jc as4c14400-60jc as4c14405-60jc AS4C14400-70JC as4c14405-70jc plastic tsop, 300 mil, 20/26-pin as4c14400-40tc as4c14405-40tc as4c14400-50tc as4c14405-50tc as4c14400-60tc as4c14405-60tc as4c14400-70tc as4c14405-70tc as4c 14400 Cxx x c dram prefix device number ras access time package: j = soj 300 mil, t = tsop 300 mil comme rcial temperature range, 0c to 70 c |
Price & Availability of AS4C14400-70JC
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |